RF (radio-frequency) oscillators (e.g., synthesizers) and clock generators based on Phase Locked Loop (PLL) are basic building blocks of any battery (or non-battery) powered computing and communication devices like laptops, tablets, smart phones, etc. Usually, when such devices enter low power mode, PLLs of those devices continue to operate and continue to consume power. One reason for keeping the PLLs in operation is because if PLLs are switched off, the wake-up time for the devices increases due to long PLL lock time, which is normally 2-50 μs. Taking into account that PLL cannot be switched off, and the number of PLLs in a chip are increasing (e.g., ten or more PLLs in a multi-core chip), PLL power consumption cannot be ignored.